In this paper we propose a new class of tree machines, called {\em generalized compressed tree machines.} Generalized compressed tree machines are obtained from complete binary tree machines by performing certain `contraction' operations. A generalized compressed tree machine of height $h$ has approximately $25\%$ less number of processors than a complete binary tree of height $h$. We show that these machines have significantly smaller (up to $74\%$ reduction) 2-dimensional and 3-dimensional VLSI layouts than the complete binary tree machines. We also show that divide-and-conquer type of algorithms initially designed for complete binary tree machines can be simulated onto compressed tree machines with no slow down. Finally, we show that generalized compressed tree machines can be embedded into an optimal size hypercube with dilation at most $2$.